This invention relates to a method of using a buffer memory for recording a plurality of picture image signals for the purpose of facilitating the simultaneous recording of a plurality of color separation plates and mask plates in a color scanner for making printing plates.
Conventionally, in making color separation plates, certain color scanners have been capable of recording a plurality of color separation plates on one sheet of recording film in a simultaneous two-color or four-color mode according to the size of the color separation plates that are to be made, in order to increase the operation efficiency of the color scanners.
In order to make color separation plates in such a mode, it is necessary to store the recording picture signals corresponding to a plurality of color separation plates in advance and to have a buffer memory later read out the necessary color separation picture signals at a proper timing so that a picture reproduction recording can be achieved in the required time-divided mode.
Conventionally, such an end has been accomplished by a method of using a buffer memory device as illustrated in FIG. 1.
As shown therein, the picture signals obtained by scanning an original picture are color separated into color separation picture signals corresponding to the ink colors, such as cyan, magenta, yellow and black. To make color separation plates, various adjustment controls such as amendment, corrections, etc., are made to the color separation signals before they are transmitted to a buffer memory device as corrected color separation picture signals C, M, Y and K.
At the buffer memory device, each of the color separation picture signals C to K is sent to either one of a first to a fourth A/D (analog/digital) converters B.sub.1 to B.sub.4 by way of an analog switch circuit A which is controlled in accordance with the particular recording mode.
For instance, the first A/D converter B.sub.1 is connected to the memory device P in such a manner that it may write date into any one of the first to fourth memory blocks P.sub.1 to P.sub.4 which the memory device P is broken into.
The second A/D converter B.sub.2 is connected to the memory device P in such a manner that it can write data into both the second and the fourth memory blocks P.sub.2 and P.sub.4.
The third A/D converter B.sub.3 is connected to the third memory block P.sub.3 while the fourth A/D converter B.sub.4 is connected to the fourth memory block P.sub.4 in such a manner that they may write data into the corresponding memory blocks P.sub.3 and P.sub.4.
The memory device P has a memory capacity and an address space which are adapted to the resolution power of the picture image and the length of one primary scan (circumferential length of the recording cylinder), and the address space is divided into four parts, each corresponding to one of the memory blocks P.sub.1 to P.sub.4. This address space can include addresses for the address space of each of the memory blocks and these addresses may be assigned so as to be consecutive between neighboring memory blocks.
Such an address control is performed by an address generator F and a write address switching circuit E.sub.W and a read address switching circuit E.sub.R which are controlled according to the particular recording more being employed.
The data read out from each of the memory blocks P.sub.1 to P.sub.4 is sent to a D/A (digital/analog) converter H by way of a recording mode switching output gate circuit G.
In the buffer memory means of the above-described structure, when any one of the color separation signals C to K is to be recorded in a monochromatic mode, the analog switch A is controlled in such a manner that the necessary picture signal (e.g., signal C) is received from the first A/D converter B.sub.1 and the output data of the first A/D converter is stored in the memory device P in such a manner as to have a series of consecutive addresses over all four of the memory blocks P.sub.1 to P.sub.4.
In the case of a simultaneous two-color recording mode, the necessary picture signal (e.g., signals C and M) is fed to both the first and the second A/D converters B.sub.1 and B.sub.2, and the output data of the first A/D converter B.sub.1 is supplied to the first and the third memory blocks P.sub.1 and P.sub.3 while the output data of the second A/D converter B.sub.2 is supplied to the second and the fourth memory blocks P.sub.2 and P.sub.4 in such a manner that the addresses are consecutive between each of the pairs of the memory blocks.
Furthermore, in the case of a simultaneous, four-color recording mode, the picture signals are sent to the corresponding A/D converters B.sub.1 to B.sub.4 and the output data of each of the four A/D converters B.sub.1 to B.sub.4 is stored in the corresponding memory block P.sub.1 to P.sub.4 so that the addresses are separate for each of the memory blocks P.sub.1 to P.sub.4.
When reading out the stored data, the data is read out from the memory device P and sent to the D/A converter H in the order of the addresses over the whole memory blocks in the case of the monochromatic mode, in the order of the addresses in each of the pairs of the memory blocks in the case of the two-color recording mode, and in the order of the addresses in each of the four memory blocks in the case of the four-color recording mode.
According to the above described buffer memory device, it is possible to achieve a simultaneous, multi-color recording mode in which a plurality of color separation pictures are sequentially (substantially simultaneously) obtained (recorded) on a single scanning exposure light beam for each revolution of the cylinder by dividing the circumferential length of the recording cylinder in a color scanner in association with the memory blocks which may be assigned with independent memory addresses.
On the other hand, it gives rise to the shortcoming that the data input line and the data output line for each of the memory blocks must be separated in order to divide the memory device P into a plurality of memory blocks P.sub.1 to P.sub.4.
Furthermore, since the address lines have to be controlled so that the addresses may be given individually to each of the memory blocks and may be consecutive between two of the memory blocks, each of the blocks must be separated with the result that the address control becomes complicated.
Additionally, since the data input line for each of the memory blocks P.sub.1 to P.sub.4 is separated from one another, a separate A/D converter must be provided for each of the memory blocks.
Also, since there is a desire to record special color isolation plates and mask plates at the same time in addition to the color separation plates of the four basic ink colors, the conventional method of using a buffer memory described above can not help but complicate the required device when such a result is to be achieved or the number of plates that are to be recorded simultaneously is increased to more than four.
Namely, in a simultaneous, three-color, five-color, six-color, seven-color or greater multi-color recording mode, a buffer memory can not be uniformly divided into a required number of memory blocks P.sub.1 to P.sub.n since the buffer memory has to be divided into a number of parts other than two or four parts. Moreover, since a memory unit of one chip (one IC) or a memory device of an equivalent unit can not store two sets of data at the same time, the memory capacity is required to be greater than actually necessary as determined by the circumferential length of the recording cylinder and the pixel pitch, with the necessary number of color separation plates that have to be recorded at the same time and the kinds of the plates that are required to be recorded at the same time fully taken into account.
Additionally, since the used memory capacity in each of the memory blocks P.sub.1 to P.sub.4 varies depending on the number of plates that are to be recorded simultaneously and the total number of necessary plates, the control of reading and writing addresses as well as the control of the input and output data can not help becoming complicated.